Donald S. Gerber
9Patents
5h-index
9Co-inventors
56Inventor score
Filing activity: Apr 17, 1990 → Aug 11, 2010
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5073230A | Means and methods of lifting and relocating an epitaxial device layer | Emerging Cross-Sectional Technologies | 137 | Expired |
| US6432773B1 | Memory cell having an ONO film with an ONO sidewall and method of fabricating same | Electricity | 16 | Expired |
| US6222761A | Method for minimizing program disturb in a memory cell | Physics | 12 | Expired |
| US6236595A | Programming method for a memory cell | Physics | 7 | Expired |
| US6300183A | Independently programmable memory segments within a PMOS electrically erasable programmable read only memory array achieved by N-well separation and method therefor | Electricity | 5 | Expired |
| US6504191B2 | Independently programmable memory segments within a PMOS electrically erasable programmable read only memory array achieved by N-well separation and method therefor | Electricity | 4 | Expired |
| US7466591B2 | Method for programming and erasing an array of NMOS EEPROM cells that minimizes bit disturbances and voltage withstand requirements for the memory array and supporting circuits | Electricity | 3 | Active |
| US7817474B2 | Method for programming and erasing an array of NMOS EEPROM cells that minimizes bit disturbances and voltage withstand requirements for the memory array and supporting circuits | Electricity | 2 | Active |
| US8094503B2 | Method of programming an array of NMOS EEPROM cells that minimizes bit disturbances and voltage withstand requirements for the memory array and supporting circuits | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.