Duofeng Yue
13Patents
5h-index
26Co-inventors
62Inventor score
Filing activity: Jul 21, 2004 → Feb 29, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7211516B2 | Nickel silicide including indium and a method of manufacture therefor | Electricity | 23 | Expired |
| US7344985B2 | Nickel alloy silicide including indium and a method of manufacture therefor | Electricity | 18 | Active |
| US7511350B2 | Nickel alloy silicide including indium and a method of manufacture therefor | Electricity | 17 | Active |
| US7355255B2 | Nickel silicide including indium and a method of manufacture therefor | Electricity | 15 | Active |
| US7422968B2 | Method for manufacturing a semiconductor device having silicided regions | Electricity | 15 | Expired |
| US7256121B2 | Contact resistance reduction by new barrier stack process | Electricity | 5 | Expired |
| US7208398B2 | Metal-halogen physical vapor deposition for semiconductor device defect reduction | Electricity | 4 | Expired |
| US7029967B2 | Silicide method for CMOS integrated circuits | Electricity | 3 | Expired |
| US7208409B2 | Integrated circuit metal silicide method | Electricity | 3 | Expired |
| US9305688B2 | Single photomask high precision thin film resistor | Emerging Cross-Sectional Technologies | 1 | Active |
| US7397046B2 | Method for implanter angle verification and calibration | Electricity | 1 | Expired |
| US9842895B2 | Single photomask high precision thin film resistor | Emerging Cross-Sectional Technologies | 0 | Active |
| US7199032B2 | Metal silicide induced lateral excessive encroachment reduction by silicon <110> channel stuffing | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.