Eric W. Tremble
11Patents
3h-index
22Co-inventors
56Inventor score
Filing activity: Feb 10, 2004 → Aug 11, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8312404B2 | Multi-segments modeling bond wire interconnects with 2D simulations in high speed, high density wire bond packages | Electricity | 10 | Active |
| US6945791B2 | Integrated circuit redistribution package | Electricity | 5 | Expired |
| US7882469B2 | Automatic verification of adequate conductive return-current paths | Physics | 4 | Active |
| US9875956B1 | Integrated interface structure | Electricity | 1 | Active |
| US11282806B2 | Partitioned substrates with interconnect bridge | Electricity | 1 | Active |
| US10714411B2 | Interconnected integrated circuit (IC) chip structure and packaging and method of forming same | Electricity | 1 | Active |
| US8438520B2 | Early decoupling capacitor optimization method for hierarchical circuit design | Physics | 1 | Active |
| US9633914B2 | Split ball grid array pad for multi-chip modules | Electricity | 1 | Active |
| US12095494B1 | Lateral escape using triangular structure of transceivers | Electricity | 0 | Active |
| US10483233B2 | Split ball grid array pad for multi-chip modules | Electricity | 0 | Active |
| US8429590B2 | System-level method for reducing power supply noise in an electronic system | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.