Gary K. Yeap
15Patents
7h-index
41Co-inventors
66Inventor score
Filing activity: Jul 5, 1995 → Oct 10, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6286128A | Method for design optimization using logical and physical information | Physics | 149 | Expired |
| US6442743B1 | Placement method for integrated circuit design using topo-clustering | Physics | 75 | Expired |
| US6961916B2 | Placement method for integrated circuit design using topo-clustering | Physics | 27 | Expired |
| US5673420A | Method of generating power vectors for cell power dissipation simulation | Physics | 17 | Expired |
| US8726215B2 | Standard cell placement technique for double patterning technology | Physics | 15 | Active |
| US6192508A | Method for logic optimization for improving timing and congestion during placement in integrated circuit design | Physics | 13 | Expired |
| US7937677B2 | Design-for-test-aware hierarchical design planning | Physics | 7 | Active |
| US6385760B2 | System and method for concurrent placement of gates and associated wiring | Physics | 6 | Expired |
| US5825644A | Method for encoding a state machine | Physics | 5 | Expired |
| US5740407A | Method of generating power vectors for circuit power dissipation simulation having both combinational and sequential logic circuits | Physics | 4 | Expired |
| US8392870B2 | Two-chip co-design and co-optimization in three-dimensional integrated circuit net assignment | Physics | 3 | Active |
| US11816407B1 | Automatic channel identification of high-bandwidth memory channels for auto-routing | Physics | 0 | Active |
| US12118283B1 | Automatic channel identification of high-bandwidth memory channels for auto-routing | Physics | 0 | Active |
| US10922467B2 | Methodology using Fin-FET transistors | Physics | 0 | Active |
| US10817636B2 | Methodology using Fin-FET transistors | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.