Indong Kim
16Patents
2h-index
9Co-inventors
39Inventor score
Filing activity: May 31, 2016 → Jul 25, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10347306B2 | Self-optimized power management for DDR-compatible memory systems | Emerging Cross-Sectional Technologies | 6 | Active |
| US9830086B2 | Hybrid memory controller for arbitrating access to volatile and non-volatile memories in a hybrid memory group | Physics | 5 | Active |
| US10810144B2 | System and method for operating a DRR-compatible asynchronous memory module | Physics | 1 | Active |
| US9837135B2 | Methods for addressing high capacity SDRAM-like memory without increasing pin cost | Physics | 1 | Active |
| US10592114B2 | Coordinated in-module RAS features for synchronous DDR compatible memory | Physics | 0 | Active |
| US11397698B2 | Asynchronous communication protocol compatible with synchronous DDR protocol | Physics | 0 | Active |
| US10558388B2 | Memory system and method of controlling the same | Physics | 0 | Active |
| US10078448B2 | Electronic devices and memory management methods thereof | Physics | 0 | Active |
| US10504572B2 | Methods for addressing high capacity SDRAM-like memory without increasing pin cost | Physics | 0 | Active |
| US12147360B2 | Asynchronous communication protocol compatible with synchronous DDR protocol | General | 0 | Revoked |
| US12189546B2 | Asynchronous communication protocol compatible with synchronous DDR protocol | Physics | 0 | Active |
| US11029879B2 | Page size synchronization and page size aware scheduling method for non-volatile memory dual in-line memory module (NVDIMM) over memory channel | Physics | 0 | Active |
| US11294571B2 | Coordinated in-module RAS features for synchronous DDR compatible memory | Physics | 0 | Active |
| US10114560B2 | Hybrid memory controller with command buffer for arbitrating access to volatile and non-volatile memories in a hybrid memory group | Physics | 0 | Active |
| US12032828B2 | Coordinated in-module RAS features for synchronous DDR compatible memory | Physics | 0 | Active |
| US10621119B2 | Asynchronous communication protocol compatible with synchronous DDR protocol | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.