John M. Drynan
33Patents
14h-index
13Co-inventors
74Inventor score
Filing activity: Dec 4, 1996 → Jun 30, 2014
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5929524A | Semiconductor device having ring-shaped conductive spacer which connects wiring layers | Electricity | 73 | Expired |
| US5953609A | Method of manufacturing a semiconductor memory device | Electricity | 38 | Expired |
| US7268039B2 | Method of forming a contact using a sacrificial structure | Electricity | 37 | Active |
| US6962846B2 | Methods of forming a double-sided capacitor or a contact using a sacrificial structure | Electricity | 30 | Expired |
| US5939746A | Semiconductor memory device and manufacturing method of the same | Electricity | 29 | Expired |
| US6524912B1 | Planarization of metal container structures | Electricity | 28 | Expired |
| US7321150B2 | Semiconductor device precursor structures to a double-sided capacitor or a contact | Electricity | 27 | Expired |
| US7273779B2 | Method of forming a double-sided capacitor | Electricity | 26 | Expired |
| US6511896B2 | Method of etching a substantially amorphous TA2O5 comprising layer | Electricity | 25 | Expired |
| US6001734A | Formation method of contact/ through hole | Emerging Cross-Sectional Technologies | 23 | Expired |
| US6713378B2 | Interconnect line selectively isolated from an underlying contact plug | Electricity | 21 | Expired |
| US6617250B2 | Methods of depositing a layer comprising tungsten and methods of forming a transistor gate line | Electricity | 20 | Expired |
| US6511879B1 | Interconnect line selectively isolated from an underlying contact plug | Electricity | 17 | Expired |
| US6197682A | Structure of a contact hole in a semiconductor device and method of manufacturing the same | Electricity | 16 | Expired |
| US6096632A | Fabrication method of semiconductor device using CMP process | Electricity | 12 | Expired |
| US6645846B2 | Methods of forming conductive contacts to conductive structures | Emerging Cross-Sectional Technologies | 8 | Expired |
| US6781182B2 | Interconnect line selectively isolated from an underlying contact plug | Electricity | 8 | Expired |
| US6969882B2 | Interconnect line selectively isolated from an underlying contact plug | Electricity | 6 | Expired |
| US7061115B2 | Interconnect line selectively isolated from an underlying contact plug | Electricity | 6 | Expired |
| US7053462B2 | Planarization of metal container structures | Electricity | 5 | Expired |
| US7573087B2 | Interconnect line selectively isolated from an underlying contact plug | Electricity | 4 | Active |
| US6020642A | Interconnection system in a semiconductor device | Electricity | 4 | Expired |
| US7888774B2 | Interconnect line selectively isolated from an underlying contact plug | Electricity | 3 | Active |
| US7019347B2 | Dynamic random access memory circuitry comprising insulative collars | Emerging Cross-Sectional Technologies | 2 | Expired |
| US6767806B2 | METHOD OF FORMING A PATTERNED SUBSTANTIALLY CRYSTALLINE TA2O5 COMPRISING MATERIAL, AND METHOD OF FORMING A CAPACITOR HAVING A CAPACITOR DIELECTRIC REGION COMPRISING SUBSTANTIALLY CRYSTALLINE TA2O5 COMPRISING MATERIAL | Electricity | 2 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.