Michael C. Stephens, Jr.
68Patents
16h-index
22Co-inventors
84Inventor score
Filing activity: Jan 31, 1992 → Jun 17, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6061296A | Multiple data clock activation with programmable delay for use in multiple CAS latency memory devices | Physics | 171 | Expired |
| US5386385A | Method and apparatus for preventing invalid operating modes and an application to synchronous memory devices | Physics | 159 | Expired |
| US5550783A | Phase shift correction circuit for monolithic random access memory | Physics | 61 | Expired |
| US5450364A | Method and apparatus for production testing of self-refresh operations and a particular application to synchronous memory devices | Physics | 60 | Expired |
| US5548560A | Synchronous static random access memory having asynchronous test mode | Physics | 48 | Expired |
| US5295101A | Array block level redundancy with steering logic | Physics | 45 | Expired |
| US5565764A | Digital processing method for parameter estimation of synchronous, asynchronous, coherent or non-coherent signals | Physics | 44 | Expired |
| US6246619A | Self-refresh test time reduction scheme | Physics | 34 | Expired |
| US8559258B1 | Self-refresh adjustment in memory devices configured for stacked arrangements | Electricity | 28 | Active |
| US6845024B1 | Result compare circuit and method for content addressable memory (CAM) device | Physics | 28 | Expired |
| US5559752A | Timing control circuit for synchronous static random access memory | Physics | 25 | Expired |
| US6208197A | Internal charge pump voltage limit control | Electricity | 23 | Expired |
| US6954823B1 | Search engine device and method for generating output search responses from multiple input search responses | Physics | 20 | Expired |
| US8599595B1 | Memory devices with serially connected signals for stacked arrangements | Electricity | 17 | Active |
| US6052328A | High-speed synchronous write control scheme | Physics | 17 | Expired |
| US6016072A | Regulator system for an on-chip supply voltage generator | Electricity | 16 | Expired |
| US8659928B1 | Valid command detection based on stack position identifiers in memory devices configured for stacked arrangements | Electricity | 14 | Active |
| US8897053B1 | Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements | Electricity | 14 | Active |
| US8891278B1 | Stack position determination in memory devices configured for stacked arrangements | Electricity | 13 | Active |
| US9218854B2 | Stack position determination in memory devices configured for stacked arrangements | Electricity | 11 | Active |
| US9286955B1 | Semiconductor memory device having calibration circuitry for dual-gate transistors associated with a memory array | Electricity | 9 | Active |
| US6988164B1 | Compare circuit and method for content addressable memory (CAM) device | Physics | 8 | Expired |
| US8681524B1 | Supply adjustment in memory devices configured for stacked arrangements | Electricity | 7 | Active |
| US7117300B1 | Method and apparatus for restricted search operation in content addressable memory (CAM) devices | Physics | 7 | Expired |
| US6060873A | On-chip-generated supply voltage regulator with power-up mode | Physics | 6 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.