Inventor · Newberg, OR, US

Michael Espig

24Patents
6h-index
42Co-inventors
65Inventor score

Filing activity: Sep 30, 2008 → Nov 6, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US10719323B2 Systems and methods for performing matrix compress and decompress instructions Physics 46 Active
US10896043B2 Systems for performing instructions for fast element unpacking into 2-dimensional registers Physics 28 Active
US10942985B2 Apparatuses, methods, and systems for fast fourier transform configuration and computation instructions Physics 21 Active
US10922077B2 Apparatuses, methods, and systems for stencil configuration and computation instructions Physics 20 Active
US11507376B2 Systems for performing instructions for fast element unpacking into 2-dimensional registers Physics 6 Active
US11748103B2 Systems and methods for performing matrix compress and decompress instructions Physics 6 Active
US11294671B2 Systems and methods for performing duplicate detection instructions on 2D data Physics 6 Active
US11249761B2 Systems and methods for performing matrix compress and decompress instructions Physics 6 Active
US11886875B2 Systems and methods for performing nibble-sized operations on matrix elements Physics 5 Active
US11847185B2 Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elements Physics 5 Active
US8762599B2 Delegating a poll operation to another device Physics 2 Active
US8495464B2 Reliability support in memory systems without error correcting code support Electricity 1 Active
US8553693B2 Network controller circuitry to issue at least one portion of packet payload to device in manner that by-passes communication protocol stack involvement Electricity 1 Active
US12175246B2 Systems and methods for performing matrix compress and decompress instructions Physics 0 Active
US12321714B2 Compressed wallace trees in FMA circuits Physics 0 Active
US11836464B2 Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits Physics 0 Active
US8649262B2 Dynamic configuration of potential links between processing elements Electricity 0 Active
US8364862B2 Delegating a poll operation to another device Physics 0 Active
US12182570B2 Apparatuses, methods, and systems for a packed data convolution instruction with shift control and width control Physics 0 Active
US12287843B2 Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elements Physics 0 Active
US12099838B2 Instruction and logic for sum of square differences Physics 0 Active
US10713012B2 Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits Physics 0 Active
US11366636B2 Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits Physics 0 Active
US11327754B2 Method and apparatus for approximation using polynomials Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.