Robert Menezes
29Patents
8h-index
10Co-inventors
61Inventor score
Filing activity: Dec 27, 2019 → Dec 11, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10944404B1 | Low power ferroelectric based majority logic gate adder | Electricity | 53 | Active |
| US11165430B1 | Majority logic gate based sequential circuit | Electricity | 26 | Active |
| US11277137B1 | Majority logic gate with non-linear input capacitors | Electricity | 19 | Active |
| US10951213B1 | Majority logic gate fabrication | Electricity | 17 | Active |
| US11283453B2 | Low power ferroelectric based majority logic gate carry propagate and serial adder | Electricity | 11 | Active |
| US11418197B1 | Majority logic gate having paraelectric input capacitors and a local conditioning mechanism | Electricity | 10 | Active |
| US11025254B1 | Linear input and non-linear output threshold logic gate | Electricity | 9 | Active |
| US11374575B1 | Majority logic gate with non-linear input capacitors and conditioning logic | Electricity | 8 | Active |
| US11381244B1 | Low power ferroelectric based majority logic gate multiplier | Electricity | 5 | Active |
| US11705906B1 | Majority logic gate having ferroelectric input capacitors and a pulsing scheme coupled to a conditioning logic | Electricity | 3 | Active |
| US11018672B1 | Linear input and non-linear output majority logic gate | Electricity | 1 | Active |
| US11012076B1 | Linear input and non-linear output majority logic gate with and/or function | Electricity | 1 | Active |
| US11296708B2 | Low power ferroelectric based majority logic gate adder | Electricity | 1 | Active |
| US11863183B1 | Low power non-linear polar material based threshold logic gate multiplier | Electricity | 0 | Active |
| US12126339B2 | Apparatus with selectable majority gate and combinational logic gate outputs | Electricity | 0 | Active |
| US11711083B2 | Majority gate based low power ferroelectric based adder with reset mechanism | Electricity | 0 | Active |
| US11290111B1 | Majority logic gate based and-or-invert logic gate with non-linear input capacitors | Electricity | 0 | Active |
| US11374574B2 | Linear input and non-linear output threshold logic gate | Electricity | 0 | Active |
| US11539368B1 | Majority logic gate with input paraelectric capacitors | Electricity | 0 | Active |
| US12088297B2 | Majority gate based low power ferroelectric based adder with reset mechanism | Electricity | 0 | Active |
| US11742860B2 | Fabrication of a majority logic gate having non-linear input capacitors | Electricity | 0 | Active |
| US11616507B2 | Ferroelectric based latch | Electricity | 0 | Active |
| US12308837B1 | Multiplier with non-linear polar material | Electricity | 0 | Active |
| US11502691B2 | Method for using and forming low power ferroelectric based majority logic gate adder | Electricity | 0 | Active |
| US11764790B1 | Majority logic gate having paraelectric input capacitors coupled to a conditioning scheme | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.