Inventor · Boulder, CO, US

Robert Walker

21Patents
10h-index
18Co-inventors
72Inventor score

Filing activity: Dec 29, 1995 → Aug 10, 2016

Most-cited inventions

PatentTitleAreaCited byStatus
US6539536B1 Electronic design automation system and methods utilizing groups of multiple cells having loop-back connections for modeling port electrical characteristics Physics 118 Expired
US5903466A Constraint driven insertion of scan logic for implementing design for test within an integrated circuit design Physics 97 Expired
US6106568A Hierarchical scan architecture for design for test applications Physics 82 Expired
US5696771A Method and apparatus for performing partial unscan and near full scan within design for test applications Physics 72 Expired
US6058252A System and method for generating effective layout constraints for a circuit design or the like Physics 63 Expired
US5703789A Test ready compiler for design for test synthesis Physics 61 Expired
US5949692A Hierarchical scan architecture for design for test applications Physics 49 Expired
US5831868A Test ready compiler for design for test synthesis Physics 43 Expired
US6067650A Method and apparatus for performing partial unscan and near full scan within design for test applications Physics 38 Expired
US5911493A Illuminated umbrella Emerging Cross-Sectional Technologies 24 Expired
US10162918B1 Integrated circuit retiming with selective modeling of flip-flop secondary signals Physics 8 Active
US8266570B2 Density-based area recovery in electronic design automation Physics 4 Active
US8527927B2 Zone-based area recovery in electronic design automation Physics 3 Active
US8621408B2 Progressive circuit evaluation for circuit optimization Physics 3 Active
US8578321B2 Delta-slack propagation for circuit optimization Physics 2 Active
US8418116B2 Zone-based optimization framework for performing timing and design rule optimization Physics 1 Active
US10339241B1 Methods for incremental circuit design legalization during physical synthesis Physics 1 Active
US10296701B1 Retiming with fixed power-up states Physics 1 Active
US10936772B1 Methods for incremental circuit physical synthesis Physics 1 Active
US9189583B2 Look-up based buffer tree synthesis Physics 0 Active
US10255404B1 Retiming with programmable power-up states Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.