Inventor · Grenoble, FR

Simon Jeannot

17Patents
2h-index
11Co-inventors
47Inventor score

Filing activity: Dec 3, 2007 → May 24, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US7923820B2 Method of producing a porous dielectric element and corresponding dielectric element Electricity 7 Active
US9786755B2 Process for producing, from an SOI and in particular an FDSOI type substrate, transistors having gate oxides of different thicknesses, and corresponding integrated circuit Electricity 2 Active
US9793321B2 Resistive memory cell having a compact structure Electricity 1 Active
US9391015B2 Method for forming a three-dimensional structure of metal-insulator-metal type Electricity 1 Active
US9852801B1 Method for determining a leakage current through an inter-gate dielectric structure of a flash memory cell Physics 1 Active
US9735353B2 Phase-change memory cell having a compact structure Physics 1 Active
US9978764B2 Integrated circuit and method of manufacturing the same Electricity 1 Active
US8609530B2 Method for forming a three-dimensional structure of metal-insulator-metal type Electricity 1 Active
US11957067B2 Phase-change memory cell having a compact structure Physics 1 Active
US10482957B2 Resistive RAM memory cell Physics 0 Active
US11131521B2 Rocket launch module and rocket launch vehicle Mechanical Engineering; Lighting; Heating 0 Active
US11031550B2 Phase-change memory cell having a compact structure Physics 0 Active
US10707270B2 Resistive memory cell having a compact structure Electricity 0 Active
US10833094B2 Integrated circuit and method of manufacturing the same Electricity 0 Active
US11495609B2 Integrated circuit and method of manufacturing the same Electricity 0 Active
US10283563B2 Resistive memory cell having a compact structure Electricity 0 Active
US7732348B2 Method of producing a porous dielectric element and corresponding dielectric element Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.