Steven Kosier
15Patents
4h-index
16Co-inventors
53Inventor score
Filing activity: Oct 30, 2002 → Dec 23, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6804809B1 | System and method for defining a semiconductor device layout | Electricity | 17 | Expired |
| US9312473B2 | Vertical hall effect sensor | Electricity | 11 | Active |
| US7071533B1 | Bipolar junction transistor antifuse | Electricity | 11 | Expired |
| US9851417B2 | Structure and system for simultaneous sensing a magnetic field and mechanical stress | Physics | 8 | Active |
| US9013838B1 | Anisotropic magnetoresistive (AMR) sensors and techniques for fabricating same | Emerging Cross-Sectional Technologies | 4 | Active |
| US9899343B2 | High voltage tolerant bonding pad structure for trench-based semiconductor devices | Electricity | 4 | Active |
| US9818828B2 | Termination trench structures for high-voltage split-gate MOS devices | Electricity | 2 | Active |
| US9735345B2 | Vertical hall effect sensor | Electricity | 1 | Active |
| US10141440B2 | Drift-region field control of an LDMOS transistor using biased shallow-trench field plates | Electricity | 1 | Active |
| US8736003B2 | Integrated hybrid hall effect transducer | Electricity | 1 | Active |
| US10153366B2 | LDMOS transistor with lightly-doped annular RESURF periphery | Electricity | 1 | Active |
| US10746817B2 | Structure and system for simultaneous sensing a magnetic field and mechanical stress | Physics | 1 | Active |
| US7466004B2 | Diode structure to suppress parasitic current | Electricity | 1 | Active |
| US11245006B2 | Trench semiconductor device layout configurations | Electricity | 0 | Active |
| US10580861B2 | Trench semiconductor device layout configurations | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.