Sunil Ashtaputre
11Patents
10h-index
12Co-inventors
61Inventor score
Filing activity: Oct 10, 1989 → May 30, 1997
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5072402A | Routing system and method for integrated circuits | Physics | 57 | Expired |
| US5353235A | Wire length minimization in channel compactor | Physics | 50 | Expired |
| US5485396A | Symbolic routing guidance for wire networks in VLSI circuits | Physics | 49 | Expired |
| US5638291A | Method and apparatus for making integrated circuits by inserting buffers into a netlist to control clock skew | Physics | 49 | Expired |
| US5974245A | Method and apparatus for making integrated circuits by inserting buffers into a netlist | Physics | 49 | Expired |
| US5666290A | Interactive time-driven method of component placement that more directly constrains critical paths using net-based constraints | Physics | 48 | Expired |
| US5349536A | Method for optimally placing components of a VLSI circuit | Physics | 40 | Expired |
| US6014506A | Method and apparatus for improving engineering change order placement in integrated circuit designs | Physics | 36 | Expired |
| US5953236A | Method and apparatus for implementing engineering change orders in integrated circuit designs | Physics | 34 | Expired |
| US5399517A | Method of routing three layer metal gate arrays using a channel router | Emerging Cross-Sectional Technologies | 14 | Expired |
| US5377125A | Improved pad ring router | Physics | 5 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.