Yi Yang
63Patents
4h-index
31Co-inventors
62Inventor score
Filing activity: Apr 22, 2013 → Nov 28, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10134981B1 | Free layer sidewall oxidation and spacer assisted magnetic tunnel junction (MTJ) etch for high performance magnetoresistive random access memory (MRAM) devices | Electricity | 9 | Active |
| US10388862B1 | Highly selective ion beam etch hard mask for sub 60nm MRAM devices | Electricity | 7 | Active |
| US10418547B1 | Sub 60nm etchless MRAM devices by ion beam etching fabricated T-shaped bottom electrode | Electricity | 6 | Active |
| US9871195B1 | Spacer assisted ion beam etching of spin torque magnetic random access memory | Electricity | 4 | Active |
| US10714679B2 | CMP stop layer and sacrifice layer for high yield small size MRAM devices | Electricity | 4 | Active |
| US10522741B1 | Under-cut via electrode for sub 60nm etchless MRAM devices by decoupling the via etch process | Performing Operations; Transporting | 3 | Active |
| US10522753B2 | Highly selective ion beam etch hard mask for sub 60nm MRAM devices | Electricity | 3 | Active |
| US11024797B2 | Under-cut via electrode for sub 60 nm etchless MRAM devices by decoupling the via etch process | Performing Operations; Transporting | 3 | Active |
| US10516102B1 | Multiple spacer assisted physical etching of sub 60nm MRAM devices | Electricity | 3 | Active |
| US10475991B2 | Fabrication of large height top metal electrode for sub-60nm magnetoresistive random access memory (MRAM) devices | Electricity | 2 | Active |
| US10522751B2 | MTJ CD variation by HM trimming | Electricity | 2 | Active |
| US10770654B2 | Multiple spacer assisted physical etching of sub 60nm MRAM devices | Electricity | 2 | Active |
| US11375782B2 | Outdoor umbrella frame having telescopic structure | Human Necessities | 2 | Active |
| US10964887B2 | Highly physical ion resistive spacer to define chemical damage free sub 60nm MRAM devices | Electricity | 2 | Active |
| US11043632B2 | Ion beam etching process design to minimize sidewall re-deposition | Electricity | 2 | Active |
| US11800811B2 | MTJ CD variation by HM trimming | Electricity | 2 | Active |
| US11444241B2 | Self-aligned encapsulation hard mask to separate physically under-etched MTJ cells to reduce conductive R-deposition | Electricity | 1 | Active |
| US11527711B2 | MTJ device performance by controlling device shape | Electricity | 1 | Active |
| US10714680B2 | Large height tree-like sub 30nm vias to reduce conductive material re-deposition for sub 60nm MRAM devices | Electricity | 1 | Active |
| US10886461B2 | Highly physical etch resistive photoresist mask to define large height sub 30nm via and metal hard mask for MRAM devices | Electricity | 1 | Active |
| US11088320B2 | Fabrication of large height top metal electrode for sub-60nm magnetoresistive random access memory (MRAM) devices | Electricity | 1 | Active |
| US9482445B2 | Heat pump water heater with heat utilization balance processor and heat utilization balance processor thereof | Emerging Cross-Sectional Technologies | 1 | Active |
| US11818961B2 | Self-aligned encapsulation hard mask to separate physically under-etched MTJ cells to reduce conductive re-deposition | Electricity | 1 | Active |
| US11121314B2 | Large height tree-like sub 30nm vias to reduce conductive material re-deposition for sub 60nm MRAM devices | Electricity | 1 | Active |
| US10921707B2 | Self-adaptive halogen treatment to improve photoresist pattern and magnetoresistive random access memory (MRAM) device uniformity | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.