Semiconductor layer formation

US7056778B2 · kind B2 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Chun-Li Liu · Scottsdale, US
• Mariam Sadaka · Austin, US
• Alexander L. Barr · Austin, US
• Bich-Yen Nguyen · Austin, US
• Voon-Yew Thean · Fishkill, US
• Shawn George Thomas · Chesterfield, US
• Ted R. White · Austin, US
• Qianghua Xie · Chandler, US

Key dates

• Filing date: Aug 17, 2004
• Grant date: Jun 6, 2006
• Expiry date: Aug 17, 2024

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/933
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A process for forming strained semiconductor layers. The process include flowing a chlorine bearing gas (e.g. hydrogen chloride, chlorine, carbon tetrachloride, and trichloroethane) over the wafer while heating the wafer. In one example, the chorine bearing gas is flowed during a condensation process on a semiconductor layer that is used as a template layer for forming a strain semiconductor layer (e.g. strain silicon). In other examples, the chlorine bearing gas is flowed during a post bake of the wafer after the condensation operation.