Through-wafer interconnects for photoimager and memory wafers
US7683458B2 · kind B2 · utility
33Cited by
291References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2007 |
| Grant date | Mar 23, 2010 |
| Priority date | — |
| Expiry date | Nov 6, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.