Self-aligned dielectric isolation for FinFET devices

US8941156B2 · kind B2 · utility

Assignees

• International Business Machines Corporation · US
• GlobalFoundries Inc. · KY

Inventors

• Marc A. Bergendahl · Troy, US
• Kangguo Cheng · Schenectady, US
• David V. Horak · South Burlington, US
• Ali Khakifirooz · Los Altos, US
• Shom Ponoth · Irvine, US
• Theodorus E. Standaert · Clifton Park, US
• Chih-Chao Yang · Glenmont, US
• Charles W. Koburger, III · Delmar, US
• Xiuyu Cai · San Diego, US
• Ruilong Xie · Niskayuna, US

Key dates

• Filing date: Jan 7, 2013
• Grant date: Jan 27, 2015
• Expiry date: Mar 21, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/115

Abstract

Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.