Selective local metal cap layer formation for improved electromigration behavior
US9455186B2 · kind B2 · utility
4Cited by
28References
1Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 26, 2015 |
| Grant date | Sep 27, 2016 |
| Priority date | — |
| Expiry date | May 26, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a wiring structure for an integrated circuit device includes forming one or more copper lines within an interlevel dielectric layer (ILD); masking selected regions of the one or more copper lines; selectively plating metal cap regions over exposed regions of the one or more copper lines; and forming a conformal insulator layer over the metal cap regions and uncapped regions of the one or more copper lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.