Structure and process to tuck fin tips self-aligned to gates

USRE50174E1 · kind E1 · reissue

Assignee

• TESSERA LLC · US

Inventors

• Bruce B. Doris · Brewster, US
• Hong He · Schenectady, US
• Sivananda K. Kanakasabapathy · Niskayuna, US
• Gauri Karve · Cohoes, US
• Fee Li Lie · Albany, US
• Derrick Liu · Albany, US
• Soon-Cheon Seo · White Plains, US
• Stuart A. Sieg · Albany, US

Key dates

• Filing date: Mar 31, 2022
• Grant date: Oct 15, 2024
• Expiry date: Mar 31, 2042

Classification

• Technology area (CPC —): General

Abstract

A semiconductor structure is provided that includes a semiconductor fin portion having an end wall and extending upward from a substrate. A gate structure straddles a portion of the semiconductor fin portion. A first set of gate spacers is located on opposing sidewall surfaces of the gate structure; and a second set of gate spacers is located on sidewalls of the first set of gate spacers. One gate spacer of the second set of gate spacers has a lower portion that directly contacts the end wall of the semiconductor fin portion.