Third Dimension (3D) Semiconductor, Inc.
23Patents
11Active
23Granted
38Portfolio score
Filing activity: Oct 17, 1997 → Jan 16, 2009 · 11 expiring within 5 years
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7023069B2 | Method for forming thick dielectric regions using etched trenches | Electricity | 56 | Expired |
| US7052982B2 | Method for manufacturing a superjunction device with wide mesas | Electricity | 41 | Expired |
| US7041560B2 | Method of manufacturing a superjunction device with conventional terminations | Electricity | 34 | Expired |
| US6635906B1 | Voltage sustaining layer with opposite-doped islands for semi-conductor power devices | Electricity | 34 | Expired |
| US7015104B1 | Technique for forming the deep doped columns in superjunction | Electricity | 26 | Expired |
| US7109110B2 | Method of manufacturing a superjunction device | Electricity | 22 | Expired |
| US7339252B2 | Semiconductor having thick dielectric regions | Electricity | 21 | Active |
| US6936867B2 | Semiconductor high-voltage devices | Electricity | 13 | Expired |
| US7354818B2 | Process for high voltage superjunction termination | Electricity | 12 | Expired |
| US7704864B2 | Method of manufacturing a superjunction device with conventional terminations | Electricity | 11 | Active |
| US7439583B2 | Tungsten plug drain extension | Electricity | 10 | Expired |
| US7759204B2 | Process for high voltage superjunction termination | Electricity | 9 | Active |
| US7199006B2 | Planarization method of manufacturing a superjunction device | Electricity | 5 | Expired |
| US7364994B2 | Method for manufacturing a superjunction device with wide mesas | Electricity | 4 | Active |
| US8071450B2 | Method for forming voltage sustaining layer with opposite-doped islands for semiconductor power devices | Electricity | 3 | Active |
| US7271067B2 | Voltage sustaining layer with opposite-doped islands for semiconductor power devices | Electricity | 2 | Expired |
| US7227197B2 | Semiconductor high-voltage devices | Electricity | 2 | Expired |
| US7504305B2 | Technique for forming the deep doped regions in superjunction devices | Electricity | 1 | Active |
| US7622787B2 | Process for high voltage superjunction termination | Electricity | 1 | Active |
| US7498614B2 | Voltage sustaining layer with opposite-doped islands for semiconductor power devices | Electricity | 1 | Active |
| US7977745B2 | Tungsten plug drain extension | Electricity | 1 | Active |
| US7410891B2 | Method of manufacturing a superjunction device | Electricity | 1 | Active |
| US7772086B2 | Process for high voltage superjunction termination | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.