Craig T. Salling
34Patents
9h-index
13Co-inventors
64Inventor score
Filing activity: Aug 31, 2000 → Sep 21, 2006
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6646906B2 | Methods of reading ferroelectric memory cells | Electricity | 69 | Expired |
| US6587365B1 | Array architecture for depletion mode ferroelectric memory devices | Electricity | 38 | Expired |
| US6858902B1 | Efficient ESD protection with application for low capacitance I/O pads | Electricity | 29 | Expired |
| US6563175B2 | NMOS ESD protection device with thin silicide and methods for making same | Emerging Cross-Sectional Technologies | 20 | Expired |
| US7187530B2 | Electrostatic discharge protection circuit | Electricity | 17 | Expired |
| US6515889B1 | Junction-isolated depletion mode ferroelectric memory | Electricity | 13 | Expired |
| US6900969B2 | ESD protection with uniform substrate bias | Electricity | 11 | Expired |
| US6882560B2 | Reading ferroelectric memory cells | Electricity | 9 | Expired |
| US6875650B2 | Eliminating substrate noise by an electrically isolated high-voltage I/O transistor | Electricity | 9 | Expired |
| US6366489B1 | Bi-state ferroelectric memory devices, uses and operation | Electricity | 8 | Expired |
| US6724050B2 | ESD improvement by a vertical bipolar transistor with low breakdown voltage and high beta | Electricity | 8 | Expired |
| US6876022B2 | Junction-isolated depletion mode ferroelectric memory devices | Electricity | 8 | Expired |
| US6574131B1 | Depletion mode ferroelectric memory device and method of writing to and reading from the same | Electricity | 7 | Expired |
| US6665206B2 | Array architecture for depletion mode ferroelectric memory devices | Electricity | 7 | Expired |
| US6764909B2 | Structure and method of MOS transistor having increased substrate resistance | Electricity | 7 | Expired |
| US6835623B2 | NMOS ESD protection device with thin silicide and methods for making same | Emerging Cross-Sectional Technologies | 5 | Expired |
| US7256460B2 | Body-biased pMOS protection against electrostatic discharge | Electricity | 5 | Expired |
| US6449187B1 | Method and apparatus for programming flash memory device | Physics | 3 | Expired |
| US6888738B2 | Methods of writing junction-isolated depletion mode ferroelectric memory devices | Electricity | 3 | Expired |
| US6791862B2 | Junction-isolated depletion mode ferroelectric memory devices | Electricity | 3 | Expired |
| US6767810B2 | Method to increase substrate potential in MOS transistors used in ESD protection circuits | Electricity | 3 | Expired |
| US6522571B2 | Methods of forming and reading ferroelectric memory cells | Electricity | 2 | Expired |
| US6888185B2 | Junction-isolated depletion mode ferroelectric memory devices | Electricity | 2 | Expired |
| US6888747B2 | Methods of reading junction-isolated depletion mode ferroelectric memory devices | Electricity | 2 | Expired |
| US6903960B2 | Junction-isolated depletion mode ferroelectric memory devices | Electricity | 2 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.