David B. Kramer
45Patents
7h-index
39Co-inventors
69Inventor score
Filing activity: Mar 2, 2001 → Jun 16, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7149211B2 | Virtual reassembly system and method of operation thereof | Electricity | 69 | Expired |
| US7894440B2 | Programmable hash-tuple generation with parallel rule implementation independence | Electricity | 44 | Active |
| US7850013B1 | Locking mechanism for rack mounted devices | Emerging Cross-Sectional Technologies | 19 | Active |
| US7116680B1 | Processor architecture and a method of processing | Electricity | 18 | Expired |
| US7245624B2 | Processor with table-based scheduling using software-controlled interval computation | Electricity | 12 | Expired |
| US8315911B2 | Mortgage and real estate data integration and presentation system | Physics | 8 | Active |
| US7215675B2 | Processor with software-controlled programmable service levels | Electricity | 7 | Expired |
| US8615614B2 | Message passing using direct memory access unit in a data processing system | Physics | 7 | Active |
| US8473372B2 | Mortgage and real estate data integration and presentation system | Physics | 6 | Active |
| US8572322B2 | Asynchronously scheduling memory access requests | Physics | 6 | Active |
| US6850516B2 | Virtual reassembly system and method of operation thereof | Electricity | 5 | Expired |
| US8560796B2 | Scheduling memory access requests using predicted memory timing and state information | Physics | 4 | Active |
| US8560782B2 | Method and apparatus for determining access permissions in a partitioned data processing system | Physics | 4 | Active |
| US8447897B2 | Bandwidth control for a direct memory access unit within a data processing system | Physics | 4 | Active |
| US8209232B2 | Mortgage and real estate data integration and presentation system | Physics | 3 | Active |
| US7477636B2 | Processor with scheduler architecture supporting multiple distinct scheduling algorithms | Electricity | 3 | Active |
| US9195621B2 | System and method for assigning memory access transfers between communication channels | Physics | 3 | Active |
| US7159061B2 | Link layer device with configurable address pin allocation | Physics | 3 | Expired |
| US7912069B2 | Virtual segmentation system and method of operation thereof | Electricity | 3 | Active |
| US9501442B2 | Configurable peripheral componenent interconnect express (PCIe) controller | Physics | 2 | Active |
| US9436626B2 | Processor interrupt interface with interrupt partitioning and virtualization enhancements | Physics | 2 | Active |
| US7861291B2 | System and method for implementing ACLs using standard LPM engine | Electricity | 2 | Active |
| US9229884B2 | Virtualized instruction extensions for system partitioning | Physics | 2 | Active |
| US9442870B2 | Interrupt priority management using partition-based priority blocking processor registers | Physics | 2 | Active |
| US7224681B2 | Processor with dynamic table-based scheduling using multi-entry table locations for handling transmission request collisions | Electricity | 2 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.