David Michael Rogers
14Patents
8h-index
39Co-inventors
72Inventor score
Filing activity: Oct 28, 1988 → Nov 17, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6541816B2 | Planar structure for non-volatile memory devices | Emerging Cross-Sectional Technologies | 83 | Expired |
| US6468865B1 | Method of simultaneous formation of bitline isolation and periphery oxide | Electricity | 53 | Expired |
| US6555436B2 | Simultaneous formation of charge storage and bitline to wordline isolation | Emerging Cross-Sectional Technologies | 44 | Expired |
| US4987465A | Electro-static discharge protection device for CMOS integrated circuit inputs | Electricity | 42 | Expired |
| US6838869B1 | Clocked based method and devices for measuring voltage-variable capacitances and other on-chip parameters | Electricity | 40 | Expired |
| US6465306B1 | Simultaneous formation of charge storage and bitline to wordline isolation | Emerging Cross-Sectional Technologies | 30 | Expired |
| US6770938B1 | Diode fabrication for ESD/EOS protection | Electricity | 18 | Expired |
| US6530068B1 | Device modeling and characterization structure with multiplexed pads | Electricity | 15 | Expired |
| US5908318A | Method of forming low capacitance interconnect structures on semiconductor substrates | Electricity | 5 | Expired |
| US8445966B2 | Method and apparatus for protection against process-induced charging | Electricity | 4 | Active |
| US11521962B1 | ESD protection circuit | Electricity | 0 | Active |
| US9318373B2 | Method and apparatus for protection against process-induced charging | Electricity | 0 | Active |
| US11581729B2 | Combined positive and negative voltage electrostatic discharge (ESD) protection clamp with cascoded circuitry | Electricity | 0 | Active |
| US11876090B2 | ESD protection circuit | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.