Inventor · Soria, ES

Fernando Latorre

35Patents
8h-index
61Co-inventors
74Inventor score

Filing activity: May 24, 2004 → May 3, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US7478198B2 Multithreaded clustered microarchitecture with dynamic back-end assignment Physics 40 Expired
US9978014B2 Reconfigurable processing unit Physics 20 Active
US9971540B2 Storage device and method for performing convolution operations Physics 16 Active
US8185700B2 Enabling speculative state information in a cache coherency protocol Physics 16 Active
US9613001B2 Processing device for performing convolution operations Physics 16 Active
US7895415B2 Cache sharing based thread control Physics 14 Active
US8612698B2 Replacement policy for hot code detection Physics 14 Active
US8261046B2 Access of register files of other threads using synchronization Physics 11 Active
US8909902B2 Systems, methods, and apparatuses to decompose a sequential program into multiple threads, execute said threads, and reconstruct the sequential execution Physics 8 Active
US9280474B2 Adaptive data prefetching Physics 7 Active
US7313675B2 Register allocation technique Physics 7 Expired
US9158705B2 Stride-based translation lookaside buffer (TLB) prefetching with adaptive offset Physics 4 Active
US9940138B2 Utilization of register checkpointing mechanism with pointer swapping to resolve multithreading mis-speculations Physics 4 Active
US9582432B2 Instruction and logic for support of code modification in translation lookaside buffers Physics 3 Active
US9811341B2 Managed instruction cache prefetching Physics 3 Active
US8190652B2 Achieving coherence between dynamically optimized code and original code Physics 3 Active
US8423716B2 Multithreaded clustered microarchitecture with dynamic back-end assignment Physics 2 Active
US9558121B2 Two-level cache locking mechanism Physics 2 Active
US10002108B2 Processing device for performing convolution operations Physics 2 Active
US9009413B2 Method and apparatus to implement lazy flush in a virtually tagged cache memory Physics 1 Active
US11960454B2 Method of a universal registration and identification of legal procedures Electricity 1 Active
US10621092B2 Merging level cache and data cache units having indicator bits related to speculative execution Physics 1 Active
US10013326B2 Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code region Physics 1 Active
US7996617B2 Multithreaded clustered microarchitecture with dynamic back-end assignment Physics 1 Active
US11060034B2 Process and reactor for continuous charcoal production Emerging Cross-Sectional Technologies 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.