Inventor · Gilbert, AZ, US

Jaeshin Cho

12Patents
6h-index
14Co-inventors
63Inventor score

Filing activity: Jun 22, 1992 → Sep 1, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US5444016A Method of making ohmic contacts to a complementary III-V semiconductor device Emerging Cross-Sectional Technologies 47 Expired
US5484740A Method of manufacturing a III-V semiconductor gate structure Emerging Cross-Sectional Technologies 39 Expired
US5707901A Method utilizing an etch stop layer Emerging Cross-Sectional Technologies 23 Expired
US6057219A Method of forming an ohmic contact to a III-V semiconductor material Electricity 7 Expired
US5512518A Method of manufacture of multilayer dielectric on a III-V substrate Electricity 6 Expired
US5389564A Method of forming a GaAs FET having etched ohmic contacts Emerging Cross-Sectional Technologies 6 Expired
US5619064A III-V semiconductor gate structure and method of manufacture Emerging Cross-Sectional Technologies 5 Expired
US5583355A Self-aligned FET having etched ohmic contacts Emerging Cross-Sectional Technologies 4 Expired
US5384269A Methods for making and using a shallow semiconductor junction Electricity 4 Expired
US5387548A Method of forming an etched ohmic contact Emerging Cross-Sectional Technologies 2 Expired
US11380625B2 Shielding structure, semiconductor package structure with shielding structure Electricity 0 Active
US6334929B1 Plasma processing method Electricity 0 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.