Jeffrey Chee
15Patents
4h-index
22Co-inventors
60Inventor score
Filing activity: Jul 26, 1982 → May 1, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6099928A | Multipurpose transparency mat cards | Emerging Cross-Sectional Technologies | 12 | Expired |
| US10446483B2 | Metal-insulator-metal capacitors with enlarged contact areas | Electricity | 7 | Active |
| US4486042A | Gate latch | Emerging Cross-Sectional Technologies | 6 | Expired |
| US8716081B2 | Capacitor top plate over source/drain to form a 1T memory device | Electricity | 4 | Active |
| US8274115B2 | Hybrid orientation substrate with stress layer | Electricity | 3 | Active |
| US11037821B2 | Multiple patterning with self-alignment provided by spacers | Electricity | 2 | Active |
| US8053327B2 | Method of manufacture of an integrated circuit system with self-aligned isolation structures | Electricity | 2 | Active |
| US10825811B2 | Gate cut first isolation formation with contact forming process mask protection | Electricity | 1 | Active |
| US7101746B2 | Method to lower work function of gate electrode through Ge implantation | Electricity | 1 | Expired |
| USD519564S1 | Clip and cover | General | 1 | Expired |
| US6872608B1 | Method to selectively form poly SiGe P type electrode and polysilicon N type electrode through planarization | Electricity | 1 | Expired |
| US10026818B1 | Field effect transistor structure with recessed interlayer dielectric and method | Electricity | 0 | Active |
| US10347531B2 | Middle of the line (MOL) contact formation method and structure | Electricity | 0 | Active |
| US7999300B2 | Memory cell structure and method for fabrication thereof | Emerging Cross-Sectional Technologies | 0 | Active |
| US7932178B2 | Integrated circuit having a plurality of MOSFET devices | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.