Jowei Dun
17Patents
9h-index
32Co-inventors
72Inventor score
Filing activity: Feb 19, 1992 → Jun 27, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5757081A | Surface mount and flip chip technology for total integrated circuit isolation | Emerging Cross-Sectional Technologies | 185 | Expired |
| US5753529A | Surface mount and flip chip technology for total integrated circuit isolation | Emerging Cross-Sectional Technologies | 137 | Expired |
| US5767578A | Surface mount and flip chip technology with diamond film passivation for total integated circuit isolation | Electricity | 126 | Expired |
| US5956609A | Method for reducing stress and improving step-coverage of tungsten interconnects and plugs | Electricity | 76 | Expired |
| US6291872A | Three-dimensional type inductor for mixed mode radio frequency device | Electricity | 66 | Expired |
| US6291331A | Re-deposition high compressive stress PECVD oxide film after IMD CMP process to solve more than 5 metal stack via process IMD crack issue | Electricity | 64 | Expired |
| US6099662A | Process for cleaning a semiconductor substrate after chemical-mechanical polishing | Electricity | 40 | Expired |
| US5904525A | Fabrication of high-density trench DMOS using sidewall spacers | Emerging Cross-Sectional Technologies | 11 | Expired |
| US6268274A | Low temperature process for forming inter-metal gap-filling insulating layers in silicon wafer integrated circuitry | Emerging Cross-Sectional Technologies | 10 | Expired |
| US5284800A | Method for preventing the exposure of borophosphosilicate glass to the ambient and stopping phosphorus ions from infiltrating silicon in a semiconductor process | Emerging Cross-Sectional Technologies | 8 | Expired |
| US6281146A | Plasma enhanced chemical vapor deposition (PECVD) method for forming microelectronic layer with enhanced film thickness uniformity | Electricity | 7 | Expired |
| US9691863B2 | Self-aligned contact for trench power MOSFET | Electricity | 3 | Active |
| US6395635B1 | Reduction of tungsten damascene residue | Electricity | 3 | Expired |
| US10020380B2 | Power device with high aspect ratio trench contacts and submicron pitches between trenches | Electricity | 2 | Active |
| US6479881B2 | Low temperature process for forming intermetal gap-filling insulating layers in silicon wafer integrated circuitry | Emerging Cross-Sectional Technologies | 2 | Expired |
| US10644118B2 | Self-aligned contact for trench power MOSFET | Electricity | 1 | Active |
| US10424654B2 | Power device with high aspect ratio trench contacts and submicron pitches between trenches | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.