Robert William Ryan
10Patents
9h-index
8Co-inventors
61Inventor score
Filing activity: Jul 11, 1989 → Mar 10, 2000
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6294018A | Alignment techniques for epitaxial growth processes | Electricity | 284 | Expired |
| US5001534A | Heterojunction bipolar transistor | Electricity | 33 | Expired |
| US5907165A | INP heterostructure devices | Electricity | 18 | Expired |
| US6042975A | Alignment techniques for photolithography utilizing multiple photoresist layers | Electricity | 17 | Expired |
| US5106766A | Method of making a semiconductor device that comprises p-type III-V semiconductor material | Emerging Cross-Sectional Technologies | 16 | Expired |
| US6156665A | Trilayer lift-off process for semiconductor device metallization | Electricity | 15 | Expired |
| US6139995A | Method of manufacturing schottky gate transistor utilizing alignment techniques with multiple photoresist layers | Electricity | 13 | Expired |
| US6855613B1 | Method of fabricating a heterojunction bipolar transistor | Electricity | 10 | Expired |
| US5932379A | Repairing fractured wafers in semiconductor manufacturing | Emerging Cross-Sectional Technologies | 10 | Expired |
| US6165859A | Method for making InP heterostructure devices | Electricity | 5 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.