Self-aligned dual-height isolation for bulk FinFET
US9564486B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 28, 2015 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | Aug 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.