Inventor · Fremont, CA, US

Ali Burney

20Patents
11h-index
16Co-inventors
68Inventor score

Filing activity: Dec 10, 2002 → Apr 16, 2012

Most-cited inventions

PatentTitleAreaCited byStatus
US7257655B1 Embedded PCI-Express implementation Physics 73 Expired
US7590211B1 Programmable logic device integrated circuit with communications channels having sharing phase-locked-loop circuitry Electricity 41 Active
US7343388B1 Implementing crossbars and barrel shifters using multiplier-accumulator blocks Physics 16 Expired
US7587537B1 Serializer-deserializer circuits formed from input-output circuit registers Electricity 14 Active
US7274212B1 Methods and apparatus for control and configuration of programmable logic device Electricity 14 Expired
US7378868B2 Modular I/O bank architecture Electricity 14 Active
US7084664B1 Integrated circuits with reduced interconnect overhead Electricity 13 Expired
US7715467B1 Programmable logic device integrated circuit with dynamic phase alignment capabilities Electricity 13 Active
US7664978B2 Memory interface circuitry with phase detection Physics 12 Active
US7644296B1 Programmable logic device integrated circuits with configurable dynamic phase alignment circuitry Electricity 11 Active
US7555667B1 Programmable logic device integrated circuit with dynamic phase alignment capabilities and shared phase-locked-loop circuitry Physics 11 Active
US7282973B1 Enhanced DLL phase output scheme Electricity 10 Expired
US7639054B1 Techniques for generating programmable delays Electricity 8 Active
US7057412B1 Configurable crossbar switch Electricity 2 Expired
US7434192B2 Techniques for optimizing design of a hard intellectual property block for data transmission Electricity 2 Expired
US7696781B1 Methods and apparatus for control and configuration of programmable logic devices Electricity 1 Active
US8856201B1 Mixed-mode multiplier using hard and soft logic circuitry Electricity 1 Active
US6981206B1 Method and apparatus for generating parity values Electricity 0 Expired
US7468613B1 Methods and apparatus for control and configuration of programmable logic devices Electricity 0 Active
US7843216B2 Techniques for optimizing design of a hard intellectual property block for data transmission Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.