Atsuhiro Suga
17Patents
7h-index
24Co-inventors
62Inventor score
Filing activity: Jun 26, 1996 → Mar 23, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6681280B1 | Interrupt control apparatus and method separately holding respective operation information of a processor preceding a normal or a break interrupt | Physics | 88 | Expired |
| US5828860A | Data processing device equipped with cache memory and a storage unit for storing data between a main storage or CPU cache memory | Physics | 68 | Expired |
| US6868472B1 | Method of Controlling and addressing a cache memory which acts as a random address memory to increase an access speed to a main memory | Physics | 22 | Expired |
| US6374334B1 | Data processing apparatus with a cache controlling device | Physics | 10 | Expired |
| US6078993A | Data supplying apparatus for independently performing hit determination and data access | Physics | 10 | Expired |
| US7376820B2 | Information processing unit, and exception processing method for specific application-purpose operation instruction | Physics | 7 | Expired |
| US7581090B2 | Interrupt control apparatus and method | Physics | 7 | Expired |
| US6516407B1 | Information processor | Physics | 7 | Expired |
| US6076145A | Data supplying apparatus for independently performing hit determination and data access | Physics | 6 | Expired |
| US7401204B1 | Parallel Processor efficiently executing variable instruction word | Physics | 5 | Expired |
| US6889315B2 | Processor and method of controlling the same | Physics | 3 | Expired |
| US6775762B1 | Processor and processor system | Physics | 3 | Expired |
| US8839210B2 | Program performance analysis apparatus | Physics | 3 | Active |
| US7134004B1 | Processing device for buffering sequential and target sequences and target address information for multiple branch instructions | Physics | 3 | Expired |
| US7028151B2 | Information processing device equipped with improved address queue register files for cache miss | Physics | 3 | Expired |
| US8181171B2 | Method and apparatus for analyzing large scale program and generation of code from degenerated program dependence graph | Physics | 2 | Active |
| US8549227B2 | Multiprocessor system and operating method of multiprocessor system | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.