Christopher A. Spence
42Patents
17h-index
35Co-inventors
81Inventor score
Filing activity: Jul 18, 1994 → Feb 12, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6492066B1 | Characterization and synthesis of OPC structures by fourier space analysis and/or wavelet transform expansion | Physics | 217 | Expired |
| US6994939B1 | Semiconductor manufacturing resolution enhancement system and method for simultaneously patterning different feature types | Physics | 169 | Expired |
| US5766806A | Method of optical lithography using phase shift masking | Physics | 105 | Expired |
| US5573890A | Method of optical lithography using phase shift masking | Physics | 103 | Expired |
| US5702848A | Mask for optical lithography using phase shift masking and integrated circuit produced therefrom | Physics | 96 | Expired |
| US6187483A | Mask quality measurements by fourier space analysis | Physics | 91 | Expired |
| US5766804A | Method of optical lithography using phase shift masking | Physics | 70 | Expired |
| US7207017B1 | Method and system for metrology recipe generation and review and analysis of design, simulation and metrology results | Physics | 60 | Expired |
| US7120285B1 | Method for evaluation of reticle image using aerial image simulator | Physics | 43 | Expired |
| US6562639B1 | Utilizing electrical performance data to predict CD variations across stepper field | Electricity | 33 | Expired |
| US6356340B1 | Piezo programmable reticle for EUV lithography | Physics | 31 | Expired |
| US7194725B1 | System and method for design rule creation and selection | Emerging Cross-Sectional Technologies | 29 | Expired |
| US6255125A | Method and apparatus for compensating for critical dimension variations in the production of a semiconductor wafer | Electricity | 26 | Expired |
| US7313769B1 | Optimizing an integrated circuit layout by taking into consideration layout interactions as well as extra manufacturability margin | Physics | 21 | Expired |
| US5928813A | Attenuated phase shift mask | Physics | 21 | Expired |
| US7269804B2 | System and method for integrated circuit device design and manufacture using optical rule checking to screen resolution enhancement techniques | Physics | 17 | Expired |
| US6051881A | Forming local interconnects in integrated circuits | Electricity | 17 | Expired |
| US5796651A | Memory device using a reduced word line voltage during read operations and a method of accessing such a memory device | Physics | 14 | Expired |
| US6171739A | Method of determining focus and coma of a lens at various locations in an imaging field | Physics | 13 | Expired |
| US5844836A | Memory cell having increased capacitance via a local interconnect to gate capacitor and a method for making such a cell | Electricity | 12 | Expired |
| US6146954A | Minimizing transistor size in integrated circuits | Electricity | 11 | Expired |
| US5601954A | Attenuated phase shift mask comprising phase shifting layer with parabolically shaped sidewalls | Physics | 9 | Expired |
| US6046088A | Method for self-aligning polysilicon gates with field isolation and the resultant structure | Electricity | 9 | Expired |
| US6749971B2 | Method of enhancing clear field phase shift masks with chrome border around phase 180 regions | Physics | 9 | Expired |
| US6627355B2 | Method of and system for improving stability of photomasks | Physics | 8 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.