David M. Wu
14Patents
8h-index
29Co-inventors
72Inventor score
Filing activity: Oct 27, 1989 → Dec 29, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6815977B2 | Scan cell systems and methods | Physics | 44 | Expired |
| US5968194A | Method for application of weighted random patterns to partial scan designs | Physics | 35 | Expired |
| US5920489A | Method and system for modeling the behavior of a circuit | Physics | 30 | Expired |
| US5042034A | By-pass boundary scan design | Physics | 18 | Expired |
| US5272397A | Basic DCVS circuits with dual function load circuits | Electricity | 11 | Expired |
| US5581699A | System and method for testing a clock signal | Physics | 10 | Expired |
| US5299136A | Fully testable DCVS circuits with single-track global wiring | Electricity | 9 | Expired |
| US6795948B2 | Weighted random pattern test using pre-stored weights | Physics | 9 | Expired |
| US6311295A | System and method for testing a clock signal | Physics | 5 | Expired |
| US6683467B1 | Method and apparatus for providing rotational burn-in stress testing | Physics | 3 | Expired |
| US7216274B2 | Flexible scan architecture | Physics | 2 | Expired |
| US7370249B2 | Method and apparatus for testing a memory array | Physics | 1 | Expired |
| US8321730B2 | Scan architecture and design methodology yielding significant reduction in scan area and power overhead | Physics | 0 | Active |
| US7734972B2 | Common test logic for multiple operation modes | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.