Inventor · Mountain View, CA, US

Eric Braun

17Patents
3h-index
9Co-inventors
49Inventor score

Filing activity: Aug 20, 2002 → May 21, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US8922963B2 Electrostatic discharge protection circuit and method thereof Electricity 10 Active
US9502251B1 Method for fabricating low-cost isolated resurf LDMOS and associated BCD manufacturing process Electricity 5 Active
US9941171B1 Method for fabricating LDMOS with reduced source region Electricity 3 Active
US10665712B2 LDMOS device with a field plate contact metal layer with a sub-maximum size Electricity 2 Active
US6646490B1 Bipolar breakdown enhancement circuit for tri-state output stage Electricity 2 Expired
US9450052B1 EEPROM memory cell with a coupler region and method of making the same Electricity 2 Active
US9595952B2 Switching circuit and the method thereof Electricity 2 Active
US9245647B2 One-time programmable memory cell and circuit Electricity 2 Active
US10083930B2 Semiconductor device reducing parasitic loop inductance of system Emerging Cross-Sectional Technologies 1 Active
US9893518B2 ESD protection circuit with false triggering prevention Electricity 1 Active
US10069422B2 Synchronous switching converter and associated integrated semiconductor device Emerging Cross-Sectional Technologies 1 Active
US9893146B1 Lateral DMOS and the method for forming thereof Electricity 1 Active
US10263420B2 Bi-directional snapback ESD protection circuit Electricity 1 Active
US9892787B2 Multi-time programmable non-volatile memory cell and associated circuits Physics 1 Active
US11508806B1 Low leakage ESD MOSFET Electricity 0 Active
US11282959B2 FET device insensitive to noise from drive path Electricity 0 Active
US10930644B2 Bi-directional snapback ESD protection circuit Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.