Go Shikata
15Patents
3h-index
19Co-inventors
53Inventor score
Filing activity: Sep 16, 2011 → Mar 3, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10269828B2 | Semiconductor memory device | Physics | 6 | Active |
| US10332593B2 | Semiconductor memory device configured to sense memory cell threshold voltages in ascending order | Physics | 5 | Active |
| US10825829B2 | Semiconductor memory device | Physics | 3 | Active |
| US10839913B2 | Semiconductor memory | Electricity | 3 | Active |
| US9224488B2 | Semiconductor memory device | Physics | 2 | Active |
| US11164888B2 | Semiconductor memory device | Physics | 1 | Active |
| US11574663B2 | Data latch circuit and semiconductor memory device | Physics | 0 | Active |
| US11250915B2 | Semiconductor memory | Electricity | 0 | Active |
| US10783975B2 | Semiconductor memory device | Physics | 0 | Active |
| US10867641B2 | Data latch circuit and semiconductor memory device | Electricity | 0 | Active |
| US11664076B2 | Memory device including voltage control for diffusion regions associated with memory blocks | Physics | 0 | Active |
| US10529731B2 | Semiconductor memory device in which different upper limit values are set for pass voltages | Physics | 0 | Active |
| US12249381B2 | Faster multi-cell read operation using reverse read calibrations | Physics | 0 | Active |
| US9990998B2 | Semiconductor memory device and memory system | Physics | 0 | Active |
| US8618665B2 | Pattern layout in semiconductor device | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.