Kai Ma
21Patents
8h-index
33Co-inventors
71Inventor score
Filing activity: May 17, 2005 → Aug 25, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7323401B2 | Semiconductor substrate process using a low temperature deposited carbon-containing hard mask | Emerging Cross-Sectional Technologies | 541 | Expired |
| US7312162B2 | Low temperature plasma deposition process for carbon layer deposition | Electricity | 523 | Expired |
| US7109098B1 | Semiconductor junction formation process including low temperature plasma deposition of an optical absorption layer and high speed optical annealing | Electricity | 521 | Expired |
| US7429532B2 | Semiconductor substrate process using an optically writable carbon-containing mask | Electricity | 517 | Active |
| US7422775B2 | Process for low temperature plasma deposition of an optical absorption layer and high speed optical annealing | Electricity | 514 | Expired |
| US7312148B2 | Copper barrier reflow process employing high speed optical annealing | Electricity | 513 | Active |
| US7335611B2 | Copper conductor annealing process employing high speed optical annealing with a low temperature-deposited optical absorber layer | Performing Operations; Transporting | 512 | Active |
| US9288225B1 | Server port sharing based on shared socket | Electricity | 8 | Active |
| US8043981B2 | Dual frequency low temperature oxidation of a semiconductor device | Electricity | 4 | Active |
| US8309475B2 | Apparatus and method of aligning and positioning a cold substrate on a hot surface | Electricity | 2 | Active |
| US8319149B2 | Radiant anneal throughput optimization and thermal history minimization by interlacing | Performing Operations; Transporting | 2 | Active |
| US9337157B2 | Miniature passive structures for ESD protection and input and output matching | Electricity | 2 | Active |
| US8097543B2 | Apparatus and method of aligning and positioning a cold substrate on a hot surface | Electricity | 1 | Active |
| US9130511B2 | Power amplifier and linearization techniques using active and passive devices | Electricity | 1 | Active |
| US9154104B2 | Miniaturized passive low pass filter | Electricity | 0 | Active |
| US10879177B2 | PVD deposition and anneal of multi-layer metal-dielectric film | Chemistry; Metallurgy | 0 | Active |
| US9496253B2 | Miniature passive structures, high frequency electrostatic discharge protection networks, and high frequency electrostatic discharge protection schemes | Electricity | 0 | Active |
| US9431237B2 | Post treatment methods for oxide layers on semiconductor devices | Electricity | 0 | Active |
| US9373876B2 | Multiple-mode filter for radio frequency integrated circuits | Electricity | 0 | Active |
| US12033964B2 | Chemical mechanical polishing for copper dishing control | Electricity | 0 | Active |
| US9331659B2 | Integrated circuit architecture with strongly coupled LC tanks | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.