Thomas Detzel
13Patents
3h-index
24Co-inventors
60Inventor score
Filing activity: Feb 4, 2000 → Feb 16, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8502274B1 | Integrated circuit including power transistor cells and a connecting line | Electricity | 10 | Active |
| US6287174A | Polishing pad and method of use thereof | Performing Operations; Transporting | 9 | Expired |
| US7132726B2 | Integrated semiconductor circuit having a logic and power metallization without intermetal dielectric | Electricity | 3 | Expired |
| US9059182B2 | Method for producing bonding connection of semiconductor device | Electricity | 1 | Active |
| US7531439B2 | Method for forming an integrated semiconductor circuit arrangement | Electricity | 1 | Expired |
| US8603912B2 | Power semiconductor component and method for the production thereof | Electricity | 1 | Active |
| US8039931B2 | Power semiconductor component having a topmost metallization layer | Electricity | 1 | Active |
| US11257941B2 | High electron mobility transistor with doped semiconductor region in gate structure | Electricity | 0 | Active |
| US11929430B2 | High electron mobility transistor with doped semiconductor region in gate structure | Electricity | 0 | Active |
| US9418937B2 | Integrated circuit and method of forming an integrated circuit | Electricity | 0 | Active |
| US10446469B2 | Semiconductor device having a copper element and method of forming a semiconductor device having a copper element | Electricity | 0 | Active |
| US7834427B2 | Integrated circuit having a semiconductor arrangement | Electricity | 0 | Active |
| US12356653B2 | High electron mobility transistor with doped semiconductor region in gate structure | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.