Thomas W. Liston
12Patents
5h-index
19Co-inventors
59Inventor score
Filing activity: Jun 17, 2002 → Feb 24, 2014
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7940599B2 | Dual port memory device | Physics | 11 | Active |
| US6590818B1 | Method and apparatus for soft defect detection in a memory | Physics | 8 | Expired |
| US7440354B2 | Memory with level shifting word line driver and method thereof | Physics | 7 | Expired |
| US8717829B2 | System and method for soft error detection in memory devices | Physics | 6 | Active |
| US8766703B1 | Method and apparatus for sensing on-chip characteristics | Electricity | 5 | Active |
| US9026808B2 | Memory with word level power gating | Physics | 5 | Active |
| US8685800B2 | Single event latch-up prevention techniques for a semiconductor device | Electricity | 4 | Active |
| US7706207B2 | Memory with level shifting word line driver and method thereof | Physics | 2 | Active |
| US9317087B2 | Memory column drowsy control | Emerging Cross-Sectional Technologies | 1 | Active |
| US9263100B2 | Bypass system and method that mimics clock to data memory read timing | Physics | 0 | Active |
| US7554841B2 | Circuit for storing information in an integrated circuit and method therefor | Physics | 0 | Active |
| US9123545B2 | Semiconductor device with single-event latch-up prevention circuitry | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.