Uri Leder
14Patents
3h-index
25Co-inventors
60Inventor score
Filing activity: Jul 16, 1984 → Mar 30, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10298496B1 | Packet processing cache | Electricity | 12 | Active |
| US10228869B1 | Controlling shared resources and context data | Electricity | 9 | Active |
| US4512505A | Convertible platen for graphics plotter | Physics | 4 | Expired |
| US10839124B1 | Interactive compilation of software to a hardware language to satisfy formal verification constraints | Physics | 2 | Active |
| US10929584B1 | Environmental modification testing for design correctness with formal verification | Physics | 1 | Active |
| US12361195B1 | Extending cover properties in formal verification to generate failure traces that reach end-of-test | Physics | 0 | Active |
| US12175178B1 | Fuzzy scoreboard | Physics | 0 | Active |
| US12306719B1 | Link down resilience | Physics | 0 | Active |
| US11182103B1 | Dedicated communications cache | Physics | 0 | Active |
| US10911358B1 | Packet processing cache | Electricity | 0 | Active |
| US12271669B1 | Executing instruction sequences generated from software interactions as part of formal verification of a design under test | Physics | 0 | Active |
| US11544436B1 | Hardware-software interaction testing using formal verification | Physics | 0 | Active |
| US11768990B1 | Interconnect flow graph for integrated circuit design | Physics | 0 | Active |
| USRE32700E | Convertible platen for graphics plotter | General | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.