Vinayak Ghatawade
15Patents
3h-index
25Co-inventors
56Inventor score
Filing activity: Jul 18, 2009 → Oct 13, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10381327B2 | Non-volatile memory system with wide I/O memory die | Electricity | 65 | Active |
| US7893720B2 | Bus low voltage differential signaling (BLVDS) circuit | Electricity | 8 | Active |
| US9899347B1 | Wire bonded wide I/O semiconductor device | Electricity | 6 | Active |
| US9118315B2 | Scheme to improve the performance and reliability in high voltage IO circuits designed using low voltage devices | Electricity | 2 | Active |
| US9419613B2 | Low power scheme to protect the low voltage capacitors in high voltage IO circuits | Electricity | 2 | Active |
| US10020059B1 | Switchable impedance drivers and related systems and methods | Electricity | 2 | Active |
| US11210241B1 | High-level output voltage training for non-volatile memory | Physics | 1 | Active |
| US10997097B2 | Enabling high speed command address interface for random read | Physics | 1 | Active |
| US10249592B2 | Wire bonded wide I/O semiconductor device | Electricity | 1 | Active |
| US10838901B1 | System and method for a reconfigurable controller bridge chip | Emerging Cross-Sectional Technologies | 1 | Active |
| US9240400B2 | Scheme to reduce stress of input/ output (IO) driver | Electricity | 1 | Active |
| US11048443B1 | Non-volatile memory interface | Physics | 0 | Active |
| US10817223B1 | Unified chip enable, address and command latch enable protocol for nand memory | Electricity | 0 | Active |
| US8779818B2 | Optimizing pre-driver control for digital integrated circuits | Electricity | 0 | Active |
| US11693794B2 | Tunable and scalable command/address protocol for non-volatile memory | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.