Inventor · Santa Monica, CA, US

Yakov Royter

13Patents

6h-index

15Co-inventors

59Inventor score

Filing activity: May 25, 2004 → Oct 20, 2016

Most-cited inventions

Patent	Title	Area	Cited by	Status
US7875952B1	Method of transistor level heterogeneous integration and system	Electricity	8	Active
US7972936B1	Method of fabrication of heterogeneous integrated circuits and devices thereof	Electricity	7	Active
US7695564B1	Thermal management substrate	Electricity	6	Active
US8860092B1	Metallic sub-collector for HBT and BJT transistors	Electricity	6	Active
US7932512B1	Implantation before epitaxial growth for photonic integrated circuits	Physics	6	Active
US7569872B1	Bipolar transistors with low parasitic losses	Electricity	6	Active
US7368765B1	Bipolar transistors with low parasitic losses	Electricity	5	Expired
US9450022B1	Memristor devices and fabrication	Electricity	4	Active
US7067898B1	Semiconductor device having a self-aligned base contact and narrow emitter	Electricity	4	Expired
US10515872B1	Metallic sub-collector for HBT and BJT transistors	Electricity	3	Active
US9508552B1	Method for forming metallic sub-collector for HBT and BJT transistors	Electricity	1	Active
US9524872B1	Heterogeneous integrated circuits and devices thereof with a surrogate substrate and transferred semiconductor devices	Electricity	0	Active
US8900896B1	Implantation before epitaxial growth for photonic integrated circuits	Physics	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.