Bryan J. Wang
24Patents
4h-index
18Co-inventors
56Inventor score
Filing activity: May 25, 2005 → Dec 6, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8111089B2 | Building block for a secure CMOS logic cell library | Electricity | 26 | Active |
| US8151235B2 | Camouflaging a standard cell based integrated circuit | Electricity | 16 | Active |
| US8510700B2 | Method and apparatus for camouflaging a standard cell based integrated circuit with micro circuits and post processing | Electricity | 6 | Active |
| US9735781B2 | Physically unclonable camouflage structure and methods for fabricating same | Electricity | 4 | Active |
| US10817638B2 | Method and apparatus for camouflaging an integrated circuit using virtual camouflage cells | Physics | 2 | Active |
| US11195008B2 | Electronic document data extraction | Physics | 2 | Active |
| US8418091B2 | Method and apparatus for camouflaging a standard cell based integrated circuit | Electricity | 2 | Active |
| US10574237B2 | Physically unclonable camouflage structure and methods for fabricating same | Electricity | 2 | Active |
| US9940425B2 | Method and apparatus for camouflaging a standard cell based integrated circuit with micro circuits and post processing | Electricity | 1 | Active |
| US7429963B2 | Image processing device and method | Physics | 1 | Active |
| US11264990B2 | Physically unclonable camouflage structure and methods for fabricating same | Electricity | 0 | Active |
| US12423026B2 | Obfuscation of data in a memory | Physics | 0 | Active |
| US11861374B2 | Batch transfer of commands and data in a secure computer system | Physics | 0 | Active |
| US12332732B2 | Pipelined hardware error classification and handling | Physics | 0 | Active |
| US10691860B2 | Secure logic locking and configuration with camouflaged programmable micro netlists | Physics | 0 | Active |
| US9542520B2 | Method and apparatus for camouflaging a standard cell based integrated circuit with micro circuits and post processing | Electricity | 0 | Active |
| US11637076B2 | Electrically isolated gate contact in FINFET technology for camouflaging integrated circuits from reverse engineering | Electricity | 0 | Active |
| US9355199B2 | Method and apparatus for camouflaging a standard cell based integrated circuit | Electricity | 0 | Active |
| US10923596B2 | Camouflaged FinFET and method for producing same | Electricity | 0 | Active |
| US11664332B2 | Always-on FinFET with camouflaged punch stop implants for protecting integrated circuits from reverse engineering | Electricity | 0 | Active |
| US11710332B2 | Electronic document data extraction | Physics | 0 | Active |
| US12229065B2 | Data flow control module for autonomous flow control of multiple DMA engines | Physics | 0 | Active |
| US11163930B2 | Secure logic locking and configuration with camouflaged programmable micro netlists | Physics | 0 | Active |
| US12131067B2 | Multiple host memory controller | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.