Inventor · Plano, TX, US

Doug Weiser

13Patents
1h-index
15Co-inventors
47Inventor score

Filing activity: Dec 4, 2003 → Sep 8, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US7039888B2 Modeling process for integrated circuit film resistors Physics 27 Expired
US10522663B2 Integrated JFET structure with implanted backgate Electricity 1 Active
US8436635B2 Semiconductor wafer having test modules including pin matrix selectable test devices Physics 1 Active
US10629683B2 High voltage DEMOS transistor with improved threshold voltage matching Electricity 0 Active
US11257907B2 High voltage demos transistor with improved threshold voltage matching Electricity 0 Active
US10374100B2 Programmable non-volatile memory with low off current Electricity 0 Active
US9991329B2 Method and structure for dual sheet resistance trimmable thin film resistors at same level Electricity 0 Active
US10103278B2 Silicon IMPATT diode Electricity 0 Active
US10770538B2 Method and structure for dual sheet resistance trimmable thin film resistors Electricity 0 Active
US10497630B2 High density wafer level test module Electricity 0 Active
US10079294B2 Integrated JFET structure with implanted backgate Electricity 0 Active
US11676993B2 Method and structure for dual sheet resistance trimmable thin film resistors Electricity 0 Active
US9412879B2 Integration of the silicon IMPATT diode in an analog technology Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.