Inventor · Boise, ID, US

Feng Lin

115Patents
18h-index
11Co-inventors
83Inventor score

Filing activity: Jun 1, 2000 → Jul 21, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US6445231B1 Digital dual-loop DLL design using coarse and fine loops Electricity 80 Expired
US6839301B2 Method and apparatus for improving stability and lock time for synchronous circuits Physics 53 Expired
US6940328B2 Methods and apparatus for duty cycle control Electricity 52 Expired
US6868504B1 Interleaved delay line for phase locked and delay locked loops Electricity 42 Expired
US6774690B2 Digital dual-loop DLL design using coarse and fine loops Electricity 41 Expired
US6798259B2 System and method to improve the efficiency of synchronous mirror delays and delay locked loops Electricity 39 Expired
US6779126B1 Phase detector for all-digital phase locked and delay locked loops Electricity 37 Expired
US6930955B2 Method and apparatus for establishing and maintaining desired read latency in high-speed DRAM Physics 33 Expired
US7660187B2 Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM Electricity 32 Active
US6950487B2 Phase splitter using digital delay locked loops Electricity 30 Expired
US7158443B2 Delay-lock loop and method adapting itself to operate over a wide frequency range Physics 27 Expired
US6618283B2 System and method for skew compensating a clock signal and for capturing a digital signal using the skew compensated clock signal Electricity 26 Expired
US6895522B2 Method and apparatus for compensating duty cycle distortion in a data output signal from a memory device by delaying and distorting a reference clock Physics 24 Expired
US6845459B2 System and method to provide tight locking for DLL and PLL with large range, and dynamic tracking of PVT variations using interleaved delay lines Electricity 24 Expired
US7436202B2 Method and apparatus for calibrating driver impedance Physics 23 Active
US6930525B2 Methods and apparatus for delay circuit Electricity 22 Expired
US6812753B2 System and method for skew compensating a clock signal and for capturing a digital signal using the skew compensated clock signal Electricity 22 Expired
US6611475B2 System and method for skew compensating a clock signal and for capturing a digital signal using the skew compensated clock signal Electricity 21 Expired
US6762974B1 Method and apparatus for establishing and maintaining desired read latency in high-speed DRAM Physics 18 Expired
US7098714B2 Centralizing the lock point of a synchronous circuit Electricity 18 Expired
US7428284B2 Phase detector and method providing rapid locking of delay-lock loops Electricity 18 Active
US7245553B2 Memory system and method for strobing data, command and address signals Physics 15 Expired
US7206956B2 Duty cycle distortion compensation for the data output of a memory device Physics 14 Expired
US7109807B2 Phase detector for reducing noise Electricity 14 Expired
US6891415B2 Method and apparatus for enabling a timing synchronization circuit Electricity 14 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.