Jarrod Eliason
20Patents
9h-index
18Co-inventors
72Inventor score
Filing activity: Jul 12, 1999 → Aug 11, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6894549B2 | Ferroelectric non-volatile logic elements | Electricity | 425 | Expired |
| US6141237A | Ferroelectric non-volatile latch circuits | Physics | 58 | Expired |
| US7180141B2 | Ferroelectric capacitor with parallel resistance for ferroelectric memory | Electricity | 27 | Expired |
| US7133304B2 | Method and apparatus to reduce storage node disturbance in ferroelectric memory | Physics | 24 | Expired |
| US6730950B1 | Local interconnect using the electrode of a ferroelectric | Electricity | 23 | Expired |
| US6980459B2 | Non-volatile SRAM | Physics | 18 | Expired |
| US6650158B2 | Ferroelectric non-volatile logic elements | Electricity | 14 | Expired |
| US6819601B2 | Programmable reference for 1T/1C ferroelectric memories | Physics | 14 | Expired |
| US6275425A | Ferroelectric voltage boost circuits | Physics | 13 | Expired |
| US6965520B1 | Delay system for generating control signals in ferroelectric memory devices | Physics | 9 | Expired |
| US7344939B2 | Ferroelectric capacitor with parallel resistance for ferroelectric memory | Electricity | 5 | Active |
| US7200027B2 | Ferroelectric memory reference generator systems using staging capacitors | Physics | 5 | Expired |
| US6430093B1 | CMOS boosting circuit utilizing ferroelectric capacitors | Physics | 4 | Expired |
| US6864738B2 | CMOS voltage booster circuits | Emerging Cross-Sectional Technologies | 4 | Expired |
| US7301795B2 | Accelerated low power fatigue testing of FRAM | Physics | 4 | Expired |
| US7038932B1 | High reliability area efficient non-volatile configuration data storage for ferroelectric memories | Physics | 3 | Expired |
| US6909318B2 | CMOS voltage booster circuit | Emerging Cross-Sectional Technologies | 2 | Expired |
| US7233194B2 | CMOS voltage booster circuits | Emerging Cross-Sectional Technologies | 1 | Expired |
| US8963343B1 | Ferroelectric memories with a stress buffer | Electricity | 0 | Active |
| US11372620B1 | Voice monitoring system and method | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.