John M. Pierce
20Patents
12h-index
21Co-inventors
81Inventor score
Filing activity: Nov 17, 1975 → May 13, 2004
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5287663A | Polishing pad and method for polishing semiconductor wafers | Performing Operations; Transporting | 111 | Expired |
| US4267012A | Process for patterning metal connections on a semiconductor structure by using a tungsten-titanium etch resistant layer | Electricity | 45 | Expired |
| US5422289A | Method of manufacturing a fully planarized MOSFET and resulting structure | Electricity | 44 | Expired |
| US5302551A | Method for planarizing the surface of an integrated circuit over a metal interconnect layer | Electricity | 44 | Expired |
| US5094972A | Means of planarizing integrated circuits with fully recessed isolation dielectric | Emerging Cross-Sectional Technologies | 39 | Expired |
| US6406093B1 | Attachment for seat assembly | Performing Operations; Transporting | 28 | Expired |
| US5683941A | Self-aligned polycide process that utilizes a planarized layer of material to expose polysilicon structures to a subsequently deposited metal layer that is reacted to form the metal silicide | Electricity | 27 | Expired |
| US4619844A | Method and apparatus for low pressure chemical vapor deposition | Chemistry; Metallurgy | 26 | Expired |
| US5883010A | Method for protecting nonsilicided surfaces from silicide formation using spacer oxide mask | Electricity | 24 | Expired |
| US5589412A | Method of making increased-density flash EPROM that utilizes a series of planarized, self-aligned, intermediate strips of conductive material to contact the drain regions | Electricity | 16 | Expired |
| US4352239A | Process for suppressing electromigration in conducting lines formed on integrated circuits by control of crystalline boundary orientation | Emerging Cross-Sectional Technologies | 15 | Expired |
| US5759882A | Method of fabricating self-aligned contacts and local interconnects in CMOS and BICMOS processes using chemical mechanical polishing (CMP) | Electricity | 12 | Expired |
| US4630343A | Product for making isolated semiconductor structure | Electricity | 11 | Expired |
| US4489482A | Impregnation of aluminum interconnects with copper | Electricity | 7 | Expired |
| US4490737A | Smooth glass insulating film over interconnects on an integrated circuit | Electricity | 7 | Expired |
| US6786373B2 | Adjustable frame for retaining hand truck on vehicular body | Performing Operations; Transporting | 6 | Expired |
| US6948645B2 | Adjustable frame for retaining hand truck on vehicular body | Performing Operations; Transporting | 4 | Expired |
| US4727048A | Process for making isolated semiconductor structure | Electricity | 2 | Expired |
| US6008107A | Method of planarizing integrated circuits with fully recessed isolation dielectric | Emerging Cross-Sectional Technologies | 2 | Expired |
| US4221834A | Superconductive magnetic shield and method of making same | Emerging Cross-Sectional Technologies | 2 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.