Robert E. Palmer
54Patents
11h-index
21Co-inventors
78Inventor score
Filing activity: Apr 23, 1979 → Mar 20, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6556628B1 | Methods and systems for transmitting and receiving differential signals over a plurality of conductors | Electricity | 213 | Expired |
| US5933607A | Digital communication system for simultaneous transmission of data from constant and variable rate sources | Electricity | 124 | Expired |
| US7319345B2 | Wide-range multi-phase clock generator | Electricity | 51 | Expired |
| US8432768B2 | Mesochronous signaling system with multiple power modes | Emerging Cross-Sectional Technologies | 51 | Active |
| US7639737B2 | Adaptive equalization using correlation of edge samples with data patterns | Electricity | 28 | Active |
| US9318183B2 | Maintenance operations in a DRAM | Physics | 21 | Active |
| US8918669B2 | Mesochronous signaling system with clock-stopped low power mode | Emerging Cross-Sectional Technologies | 16 | Active |
| US9933960B2 | Maintenance operations in a DRAM | Physics | 12 | Active |
| US8737162B2 | Clock-forwarding low-power signaling system | Emerging Cross-Sectional Technologies | 12 | Active |
| US9043633B2 | Memory controller with transaction-queue-monitoring power mode circuitry | Emerging Cross-Sectional Technologies | 12 | Active |
| US7271623B2 | Low-power receiver equalization in a clocked sense amplifier | Electricity | 11 | Expired |
| US8918667B2 | Mesochronous signaling system with core-clock synchronization | Emerging Cross-Sectional Technologies | 11 | Active |
| US9229523B2 | Memory controller with transaction-queue-dependent power modes | Emerging Cross-Sectional Technologies | 10 | Active |
| US9437276B2 | Maintenance operations in a DRAM | Physics | 10 | Active |
| US8243783B2 | Adaptive equalization using correlation of edge samples with data patterns | Electricity | 9 | Active |
| US9368172B2 | Read strobe gating mechanism | Physics | 9 | Active |
| US8949520B2 | Maintenance operations in a DRAM | Physics | 9 | Active |
| US9892771B2 | Memory controller with dynamic core-transfer latency | Physics | 9 | Active |
| US10331193B2 | Signaling interface with phase and framing calibration | Emerging Cross-Sectional Technologies | 8 | Active |
| US8689159B1 | Redundancy for on-chip interconnect | Physics | 6 | Active |
| US11556164B2 | Memory IC with data loopback | Emerging Cross-Sectional Technologies | 4 | Active |
| US8310294B2 | Low-power clock generation and distribution circuitry | Electricity | 4 | Active |
| US7664166B2 | Pleisiochronous repeater system and components thereof | Electricity | 4 | Active |
| US10212008B2 | Adaptive equalization using correlation of data patterns with errors | Electricity | 3 | Active |
| US8665940B2 | Adaptive equalization using correlation of edge samples with data patterns | Electricity | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.