Wiren D. Becker
46Patents
9h-index
79Co-inventors
78Inventor score
Filing activity: Dec 21, 1994 → Oct 24, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7362697B2 | Self-healing chip-to-chip interface | Electricity | 78 | Expired |
| US5477460A | Early high level net based analysis of simultaneous switching | Physics | 24 | Expired |
| US7113401B2 | System for airflow management in electronic enclosures | Physics | 21 | Expired |
| US7382844B2 | Methods to self-synchronize clocks on multiple chips in a system | Physics | 18 | Active |
| US7233170B2 | Programmable driver delay | Electricity | 16 | Expired |
| US6323050A | Method for evaluating decoupling capacitor placement for VLSI chips | Physics | 11 | Expired |
| US8050174B2 | Self-healing chip-to-chip interface | Electricity | 10 | Active |
| US7284992B2 | Electronic package structures using land grid array interposers for module-to-board interconnection | Electricity | 9 | Expired |
| US6713686B2 | Apparatus and method for repairing electronic packages | Emerging Cross-Sectional Technologies | 9 | Expired |
| US9548551B1 | DIMM connector region vias and routing | Electricity | 8 | Active |
| US8261226B1 | Network flow based module bottom surface metal pin assignment | Physics | 8 | Active |
| US9625220B1 | Structurally dynamic heat sink | Mechanical Engineering; Lighting; Heating | 8 | Active |
| US7813266B2 | Self-healing chip-to-chip interface | Electricity | 7 | Active |
| US7465882B2 | Ceramic substrate grid structure for the creation of virtual coax arrangement | Emerging Cross-Sectional Technologies | 7 | Active |
| US6529023B2 | Application and test methodology for use with compression land grid array connectors | Physics | 7 | Expired |
| US6618843B2 | Method for evaluating decoupling capacitor placement for VLSI chips | Physics | 5 | Expired |
| US6437252B1 | Method and structure for reducing power noise | Emerging Cross-Sectional Technologies | 5 | Expired |
| US6058488A | Method of reducing computer module cycle time | Electricity | 5 | Expired |
| US10135162B1 | Method for fabricating a hybrid land grid array connector | Emerging Cross-Sectional Technologies | 5 | Active |
| US10128593B1 | Connector having a body with a conductive layer common to top and bottom surfaces of the body as well as to wall surfaces of a plurality of holes in the body | Emerging Cross-Sectional Technologies | 4 | Active |
| US8295419B2 | Method and apparatus for generating synchronization signals for synchronizing multiple chips in a system | Electricity | 4 | Active |
| US7987587B2 | Method of forming solid vias in a printed circuit board | Emerging Cross-Sectional Technologies | 4 | Active |
| US6618844B2 | Method for evaluating decoupling capacitor placement for VLSI chips | Physics | 4 | Expired |
| US10247489B2 | Structural dynamic heat sink | Mechanical Engineering; Lighting; Heating | 3 | Active |
| US7826579B2 | Method and apparatus for generating synchronization signals for synchronizing multiple chips in a system | Electricity | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.