Zafer Kutlu
21Patents
6h-index
30Co-inventors
69Inventor score
Filing activity: Jan 12, 1998 → May 6, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6114761A | Thermally-enhanced flip chip IC package with extruded heatspreader | Electricity | 91 | Expired |
| US6472762B1 | Enhanced laminate flipchip package using a high CTE heatspreader | Electricity | 77 | Expired |
| US6111313A | Integrated circuit package having a stiffener dimensioned to receive heat transferred laterally from the integrated circuit | Electricity | 36 | Expired |
| US6590292B1 | Thermal and mechanical attachment of a heatspreader to a flip-chip integrated circuit structure using underfill | Electricity | 21 | Expired |
| US7968999B2 | Process of grounding heat spreader/stiffener to a flip chip package using solder and film adhesive | Electricity | 12 | Active |
| US7096748B2 | Embedded strain gauge in printed circuit boards | Electricity | 11 | Expired |
| US6639321B1 | Balanced coefficient of thermal expansion for flip chip ball grid array | Electricity | 6 | Expired |
| US7190082B2 | Low stress flip-chip package for low-K silicon technology | Electricity | 4 | Expired |
| US7528616B2 | Zero ATE insertion force interposer daughter card | Electricity | 4 | Expired |
| US7345245B2 | Robust high density substrate design for thermal cycling reliability | Electricity | 3 | Expired |
| US11410977B2 | Electronic module for high power applications | Electricity | 2 | Active |
| US6673708B1 | Thermal and mechanical attachment of a heatspreader to a flip-chip integrated circuit structure using underfill | Electricity | 2 | Expired |
| US7354790B2 | Method and apparatus for avoiding dicing chip-outs in integrated circuit die | Electricity | 1 | Expired |
| US6806119B2 | Method of balanced coefficient of thermal expansion for flip chip ball grid array | Electricity | 1 | Expired |
| US6534968B1 | Integrated circuit test vehicle | Electricity | 1 | Expired |
| US11476232B2 | Three-dimensional packaging techniques for power FET density improvement | Electricity | 0 | Active |
| US11270986B2 | Package with overhang inductor | Electricity | 0 | Active |
| US11955437B2 | Regulator circuit package techniques | Emerging Cross-Sectional Technologies | 0 | Active |
| US6465338B1 | Method of planarizing die solder balls by employing a die's weight | Electricity | 0 | Expired |
| US11037883B2 | Regulator circuit package techniques | Emerging Cross-Sectional Technologies | 0 | Active |
| US7479703B1 | Integrated circuit package with sputtered heat sink for improved thermal performance | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.