Inventor · Plano, TX, US

Greg Baldwin

42Patents
8h-index
25Co-inventors
71Inventor score

Filing activity: Dec 8, 1998 → Mar 29, 2017

Most-cited inventions

PatentTitleAreaCited byStatus
US8260432B2 Moldable charger with shape-sensing means for an implantable pulse generator Human Necessities 63 Active
US8428746B2 Moldable charger with shape-sensing means for an implantable pulse generator Human Necessities 31 Active
US10068903B2 Methods and apparatus for artificial exciton in CMOS processes Electricity 30 Active
US7400025B2 Integrated circuit inductor with integrated vias Electricity 21 Expired
US9399131B2 Moldable charger with support members for charging an implantable pulse generator Electricity 21 Active
US6150669A Combination test structures for in-situ measurements during fabrication of semiconductor devices Electricity 15 Expired
US6730554B1 Multi-layer silicide block process Electricity 15 Expired
US6211769A System to minimize the temperature coefficient of resistance of passive resistors in an integrated circuit process flow Electricity 10 Expired
US8859357B2 Method for improving device performance using dual stress liner boundary Electricity 6 Active
US6727133B1 Integrated circuit resistors in a high performance CMOS process Electricity 5 Expired
US8344479B2 Integrated circuit inductor with integrated vias Electricity 5 Active
US8232158B2 Compensated isolated p-well DENMOS devices Electricity 5 Active
US7718482B2 CD gate bias reduction and differential N+ poly doping for CMOS circuits Electricity 4 Active
US6333238A Method for minimizing the temperature coefficient of resistance of passive resistors in an integrated circuit process flow Electricity 4 Expired
US8260434B2 Paddle lead configurations for electrical stimulation systems and methods of making and using Human Necessities 3 Active
US7994009B2 Low cost transistors using gate orientation and optimized implants Electricity 2 Active
US8676322B2 Methods and systems of treating pancreatitis pain Human Necessities 2 Active
US8377772B2 CMOS integration method for optimal IO transistor VT Electricity 2 Active
US8682438B2 Connector assemblies for implantable stimulators Human Necessities 2 Active
US8600512B2 Methods and systems for treating seizures caused by brain stimulation Human Necessities 2 Active
US8352035B2 Connector assemblies for implantable stimulators Human Necessities 1 Active
US8914112B2 Methods and systems of treating pancreatitis pain caused by sphincter of Oddi dysfunction Human Necessities 1 Active
US8940598B2 Low temperature coefficient resistor in CMOS flow Electricity 1 Active
US9735159B2 Optimized layout for relaxed and strained liner in single stress liner technology Electricity 1 Active
US9543437B2 Integrated circuit with dual stress liner boundary Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.